1. Technical Field
This invention is directed to processes for device fabrication in which the devices are semiconductor devices with shallow junctions.
2. Art Background
Semiconductor devices such as complementary metal-oxide-semiconductor (CMOS) devices and bipolar junction transistor devices (BJTs) such as field effect transistors (FETs) have junctions formed in the substrate by introducing impurities (dopants) into the substrate. The dopants used to form regions of the junction (e.g. the source and drain in a CMOS device and the emitter in bipolar device) are of a different type (n-type or p-type) than the semiconductor substrate body surrounding these regions. These regions are of opposite doping type so that substantially no current will pass from the source to the semiconductor body or the drain to the semiconductor body.
The usual method of introducing dopant atoms which is controllable, reproducible, and free from most undesirable side effects is ion implantation. During ion implantation, dopant atoms are ionized, accelerated, and directed at a crystalline substrate such as a silicon substrate. The dopant atoms enter the crystal lattice of the silicon substrate, collide with silicon atoms and gradually lose energy, finally coming to rest at some depth within the crystal lattice. The average depth is controlled by adjusting the acceleration energy. The dopant dose is controlled by monitoring the ion current during implantation.
One consequence of ion implantation is that defects are introduced into the crystal lattice. In silicon substrates, these defects are silicon atoms which are dislocated from the crystal lattice during the implant. The presence of these silicon interstitials that result from the implant cause certain dopants such as boron and phosphorus to diffuse further into the silicon substrate than they otherwise would if the silicon interstitials were not present. The effect of the silicon interstitials on the diffusion of dopants is referred to as transient enhanced diffusion (TED). The effect is transient because the amount of silicon interstitials, and therefore the effect of the silicon interstitials on dopant diffusion, decreases when the substrate is annealed.
The design rules for semiconductor devices are getting progressively smaller, i.e., 0.5 .mu.m to 0.35 .mu.m to 0.25 .mu.m to 0.18 .mu.m, etc. As design rules decrease, the necessary dopant profile (the dopant profile is the concentration of dopant as a function of the depth in the substrate) is becoming increasingly difficult to achieve. This is because the desired region (e.g. the source, drain, emitter, etc.) in which the high concentration of dopant is introduced is becoming smaller. For example, the dopant profile in the emitter/base junction of bipolar transistors must be carefully controlled in order for electrons (in the case of an n-p-n transistor) to travel across the thin base region for high frequency performance. However, as design rules decrease, TED effects are becoming more significant in the final dose profile. The TED effect varies depending upon the implant energy and dose, so the conditions that are required for a particular dopant profile are difficult to select when TED effects become significant. Also, as the depth of the region in which the desired dopant profile is introduced decreases, the damage (i.e. crystalline defects) caused by the dopant implant can unacceptably increase the leakage current of the device when off and unacceptably reduce the carrier mobility of the device when on.
TED occurs during post-implant annealing and arises from the fact that the diffusion of dopant atoms, particularly boron (B) and phosphorus (P), is undesirably enhanced by excess silicon (Si) self-interstitials generated by the implant. The generation of excess Si self-interstitials by the implant also leads to a phenomenon herein referred to as dynamic clustering whereby implanted dopant atoms form clusters or agglomerates in a semiconductor layer. These clusters or agglomerates are immobile and electrically inactive. Whereas in the past TED and dynamic clustering were not issues which overly concerned device manufacturers, TED and dynamic clustering now threaten to impose severe limitations on the minimum device dimensions attainable in future silicon device technologies.
Because of the difficulty in controlling the effects of implantation such as TED and crystalline defects, techniques that introduce dopants into silicon substrates without implantation have been sought. For example, Uchino, T., et al., "Very-High-Speed Silicon Bipolar Transistors with In-Situ Doped Polysilicon Emitter and Rapid Vapor-Phase Doping Base," IEEE Transactions on Electron Devices, Vol. 42:3 (1995) describes a technique in which rapid vapor phase doping (RVD) is used to introduce the desired boron dopant profile into the base region of a bipolar device and in-situ doping is used to introduce the desired phosphorous dopant profile in the emitter region of a bipolar device. Such techniques in which dopants are out-diffused into the substrate typically require either a high temperature (e.g. temperatures of 850.degree. C. or higher) anneal or a long anneal cycle time (e.g. cycle times greater than one hour). One disadvantage of high temperature long cycle time anneals is that there is no way to isolate a region of the device from the effects of the anneal. Consequently, potential anneal conditions are limited by the region of the substrate with the lowest thermal budget. Therefore, an anneal process in which the effects are localized is desired in those instances where time and temperature alone cannot be manipulated to provide the desired dopant profile without adversely affecting another region of the substrate.